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Article:
  Black Box with a View, Part 2
Subject:   timing
Date:   2006-03-01 10:39:07
From:   georgebelotsky
Response to: timing

Actually, timera.h looks correct.



3 << 6 = 0xC0
= 0x80 + 0x40
... which is bits 7 and 6 set
</pre>


From page 11-20 of the

    MSP430x1xx Family User's Guide
, the IDx bits (which control input clock divider) are 7 and 6 -- if both are set, the clock is divided by 8.


Also, several of TI's code examples -- such as fet140_ta_09.c -- illustrates the use of the ACLK with an HF crystal.


Best Wishes,


George.


1 to 1 of 1
  1. timing
    2006-03-01 11:58:52  bartvan deenen [View]

    • timing
      2006-03-01 12:00:52  bartvan deenen [View]

      • timing
        2006-03-01 18:11:06  georgebelotsky [View]

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